1. Technical Field of the Invention
The present invention generally relates to semiconductor integrated circuits including memory cells for driving display panels such as LCDs (liquid crystal displays) and plasma displays. In particular, the present invention relates to a semiconductor integrated circuit including SRAM (static random access memory) memory cells.
2. Description of the Related Art
LCD drivers of the related art including SRAM memory cells for driving LCDs often use dual-port memory cells to concurrently perform a data write/read operation in accordance with an instruction from a CPU and a data read operation to display images on an LCD.
FIG. 18 shows the structure of such a dual-port memory cell. The memory cell includes inverter circuits INV1 and INV2, n-channel MOS transistors QN1 and QN2, and p-channel MOS transistors QP1 and QP2. The input of the inverter circuit INV1 is connected with a first storage node N1, and the output thereof is connected with a second storage node N2. The input of the inverter circuit INV2 is connected with the second storage node N2, and the output thereof is connected with the first storage node N1. The transistors QN1 and QN2 form a first port (write/read port), and the transistors QP1 and QP2 form a second port (read-only port).
However, such a dual-port memory cell has a problem in that a large number of transistors are required to form a memory cell, resulting in a large semiconductor substrate, and the overall semiconductor integrated circuit is costly.
Japanese Unexamined Patent Application Publication No. 2002-14659 (page 2, FIG. 1) discloses a liquid crystal driving semiconductor device in which an increase in chip size and a reduction in image quality can be prevented as much as possible and a CPU can access a memory as quickly as possible. This liquid crystal driving semiconductor device includes a single-port memory that stores display-data to be displayed on a liquid crystal display section, a liquid crystal driving circuit that retrieves the display-data stored in the single-port memory at predetermined intervals and that sends the display-data to the liquid crystal display section, and a control circuit that controls the liquid crystal driving circuit so that, when a CPU does not access the single-port memory, the display-data is retrieved from the single-port memory to the liquid crystal driving circuit at the predetermined intervals and the retrieved data is sent to the liquid crystal display section, whereas, when the CPU accesses the single-port memory while the liquid crystal driving circuit is retrieving the data from the single-port memory, priority is given to the CPU so that the CPU starts an access operation while the liquid crystal driving circuit stops a display-data retrieval operation, and the liquid crystal driving circuit again starts the display-data retrieval operation immediately after the access operation.
However, there is a problem in that the display-data retrieval operation of the liquid crystal driving circuit must be stopped while the liquid crystal driving circuit is retrieving the data, thus increasing the complexity of the control operation and causing excessive power consumption.
Accordingly, in view of the foregoing points, it is an object of the present invention to provide a semiconductor integrated circuit, using a one-port memory cell, capable of smoothly performing a data write/read operation in accordance with an instruction from a CPU and a data read operation to display an image on a display panel.